DDS thoughts

The DCM/PLL on FPGAs is too jittery to use as a local oscillator source - we tried! The project requires two, or possibly three if the ADC is run at a third frequency. Using a LO of 30 MHz (and IF of 120 MHz) would give a reasonable ADC speed, though.

Options are to use a dual such as the AD995x (example project that uses one) or two Si570/Si571s. The Si571 can be pulled, but the DDS is probably a more satisfactory solution for ensuring global synchronisation.

The AD9958 is a good candidate: two channels, SPI interface, 500 MSPS. $51.46 from element14, $72.30 from RS, $31.44 from Digikey. I've requested a sample for now.

Board will need:

• Digilent PMOD interface. 8 bits and low speed, which is perfect for SPI. Plus it's the only interface I have left.
• On-board oscillator (Can be a crystal, which must be 20-30 MHz) with jumper option to disable and select the..
• SMA connector for GPS reference clock (probably 10 MHz) - requires a 1:1 balun for single ended clocks.
• Fan-out buffers
• Nine SMA connector outputs - 4 * IF, 4 * LO and 1 * ADC sample